Cadence EDA Solutions, IP Optimized for Intel Process and Packaging Technologies
February 8, 2022 | Cadence Design Systems, Inc.Estimated reading time: 1 minute
Cadence Design Systems, Inc. announced it has joined the new Intel Foundry Services (IFS) Ecosystem Alliance to support mutual customers with the development and delivery of innovative system-on-chip (SoC) designs. As a member of the alliance, Cadence is advancing adoption of Intel process and packaging technologies and Cadence state-of-the-art digital, custom/analog, verification and advanced IC packaging EDA solutions, along with Cadence Design, Verification and Tensilica IP. Using Intel and Cadence technologies, customers can accelerate time to market while reducing design barriers, risk and costs.
There are several benefits to joining the IFS Ecosystem Alliance. Cadence will have early access to process and advanced IC packaging roadmaps, process design kits (PDKs) and technical training. This allows the Cadence R&D teams to fine-tune EDA tools and IP for the Intel portfolio of process and packaging technologies so customers can meet power, performance and area (PPA) requirements.
“We’re collaborating with world-leading partners like Cadence to ensure our customers have access to a robust, comprehensive design ecosystem, process technologies, advanced packaging technologies and manufacturing capabilities,” said Dr. Randhir Thakur, president of IFS. “Cadence is constantly developing new solutions and IP to stay in front of customer demands, making them a critical ecosystem partner that aligns with our mission to address the growing global demand for chips with breakthrough SoC design technologies.”
“By joining the IFS Ecosystem Alliance, we’re demonstrating our commitment to ensuring that customers can quickly become proficient using Cadence solutions and IP supporting Intel process and packaging technologies,” said Dr. Anirudh Devgan, president and CEO of Cadence. “Our customers are under extreme pressure to deliver power-efficient and performance-optimized SoCs, and the Cadence and IFS collaboration lets our customers innovate with confidence.”
Cadence tools and IP support the company’s Intelligent System Design strategy, which enables customers to achieve SoC design excellence.
Suggested Items
Real Time with… IPC APEX EXPO 2024: Ventec Discusses New Pro-bond Family of Advanced Products
05/01/2024 | Real Time with...IPC APEX EXPOChris Hanson, Ventec's Global Head of IMS Technology, outlines the launch of four pro-bond formulas that deliver an outstanding combination of low dissipation factor (Df) with a dielectric constant (Dk) range to maximize the design window for critical PCB parameters. As Chris points out, Pro-bond is designed for low-loss, high-speed applications, while thermal-bond dissipates heat from a component through the board to a heat sink.
IPC's Vision for Empowering PCB Design Engineers
04/30/2024 | Robert Erickson, IPCAs architects of innovation, printed circuit board designers are tasked with translating increasingly complex concepts into tangible designs that power our modern world. IPC provides the necessary community, standards framework, and education to prepare these pioneers as they explore the boundaries of what’s possible, equipping engineers with the knowledge, skills, and resources required to thrive in an increasingly dynamic field.
iNEMI Packaging Tech Topic Series: Role of EDA in Advanced Semiconductor Packaging
04/26/2024 | iNEMIAdvanced semiconductor packaging with heterogenous integration has made on-package integration of multiple chips a crucial part of finding alternatives to transistor scaling. Historically, EDA tools for front-end and back-end design have evolved separately; however, design complexity and the increased number of die-to-die or die-to-substrate interconnections has led to the need for EDA tools that can support integration of overall design planning, implementation, and system analysis in a single cockpit.
Cadence, TSMC Collaborate on Wide-Ranging Innovations to Transform System and Semiconductor Design
04/25/2024 | Cadence Design SystemsCadence Design Systems, Inc. and TSMC have extended their longstanding collaboration by announcing a broad range of innovative technology advancements to accelerate design, including developments ranging from 3D-IC and advanced process nodes to design IP and photonics.
Ansys, TSMC Enable a Multiphysics Platform for Optics and Photonics, Addressing Needs of AI, HPC Silicon Systems
04/25/2024 | PRNewswireAnsys announced a collaboration with TSMC on multiphysics software for TSMC's Compact Universal Photonic Engines (COUPE). COUPE is a cutting-edge Silicon Photonics (SiPh) integration system and Co-Packaged Optics platform that mitigates coupling loss while significantly accelerating chip-to-chip and machine-to-machine communication.